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PRODID:-//Microsoft Corporation//Outlook MIMEDIR//EN
VERSION:1.0
BEGIN:VEVENT
DTSTART:20111116T233000Z
DTEND:20111117T000000Z
LOCATION:TCC 305
DESCRIPTION;ENCODING=QUOTED-PRINTABLE:ABSTRACT: Two major trends in high-performance computing, namely, larger numbers of cores and the growing size of on-chip cache memory, are creating significant challenges for evaluating the design space of future processor architectures. Fast and scalable simulations are therefore needed to sufficiently explore large multi-core systems within a limited simulation time budget. By bringing together accurate high abstraction analytical models with fast parallel simulation, architects can trade off accuracy with simulation speed to run applications longer, covering a larger portion of the hardware design space. Interval simulation provides this balance, while still providing the detail necessary to observe core-uncore interactions across the entire system. Validations against real hardware show average absolute errors within 25% for a variety of multi-threaded workloads; more than twice as accurate on average than one-IPC simulation. Further, we demonstrate scalable simulation speed of up to 2.0 MIPS when simulating a 16-core system on an 8-core SMP machine.
SUMMARY:Sniper: Exploring the Level of Abstraction for Scalable and Accurate Parallel Multi-Core Simulation
PRIORITY:3
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