SCHEDULE: NOV 12-18, 2011

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Scalable Hashing for Shared Memory Supercomputers

SESSION: Performance Evaluation and Analysis

EVENT TYPE: Paper

TIME: 1:30PM - 2:00PM

AUTHOR(S):Eric L. Goodman, M. Nicole Lemaster, Edward Jimenez

ROOM:TCC 303

ABSTRACT:
Hashing is a fundamental technique in computer science to allow O(1) insert and lookups of items in an associative array. Here we present several thread coordination and hashing strategies and compare their performance on large shared memory symmetric multiprocessor machines. We show how our approach can be used as a key kernel for fundamental paradigms such as dynamic programming and MapReduce. We further show that a set of approaches yields close to linear speedup for both uniform random and more difficult power law distributions. This scalable performance is in spite of the fact that our set of approaches is not completely lock-free. Our experimental results utilize and compare an SGI Altix UV with 4 Xeon processors (32 cores) and a Cray XMT with 128 processors. We show that the Altix UV far exceeds performance of the Cray XMT for power law distributions. However, the Cray XMT exhibits greater scalability.

Chair/Author Details:

Eric L. Goodman - Sandia National Laboratories

M. Nicole Lemaster - Sandia National Laboratories

Edward Jimenez - Sandia National Laboratories

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The full paper can be found in the ACM Digital Library