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High performance FPGA-based implementation of the seismic modeling of the RTM algorithm
SESSION: Research Poster Reception
EVENT TYPE: ACM Student Research Competition Poster, Poster, Electronic Poster
TIME: 5:15PM - 7:00PM
SESSION CHAIR: Bernd Mohr
AUTHOR(S):Victor Medeiros, Rodrigo Rocha, Antonyus Ferreira, Bruno Dutra, Abel Silva-Filho, Manoel Lima
ROOM:WSCC North Galleria 2nd/3rd Floors
ABSTRACT: Hardware accelerators like GPGPUs and FPGAs have been used as an alternative for the conventional computing architectures (CPUs) in scientific computing applications and have shown considerable speed-ups. In this context, this poster presents a solution that takes advantage from FPGA’s flexibility to explore efficiently data reuse, parallelization in both time and space domains for the first processing stage of the RTM (Reverse Time Migration) algorithm, the seismic modeling.
In order to obtain a comparison basis for our FPGA implementation, we also implemented the same algorithms for a CPU and GPGPU architectures. Our results showed that the FPGAs are a feasible platform for this set of applications. The experimental results have shown a 1.67x speed-up when compared to a Tesla C1060 GPGPU and a 25.79x speed-up when compared to an AMD Athlon 64 X2 CPU-based approach.
Bernd Mohr (Chair) - Juelich Supercomputing Centre
Victor Medeiros - Federal University of Pernambuco
Rodrigo Rocha - Federal University of Pernambuco
Antonyus Ferreira - Federal University of Pernambuco
Bruno Dutra - Federal University of Pernambuco
Abel Silva-Filho - Federal University of Pernambuco